The present disclosure relates to digital signal processing in hardware compute pipelines.
Digital signal processing in modern electronic devices can consume a large amount of power, particularly for today's high performance applications. Image signal processing in mobile electronic devices, for example, can consume a large amount of the limited power available to these devices. As the performance expectation of mobile computing devices increases, so can the power consumed.
Power consumption in digital signal processing for many devices is a function of the number of bits processed by a hardware compute pipeline. For example, fixed or floating point hardware pipelines for image signal processing typically include a large number of bits to support a high level of precision for image data manipulation. The pipeline includes data registers and logic gates at each pipeline stage to support the selected precision. These data registers and logic gates consume power as they transition to process image data.